Technical Field
The present invention relates to semiconductor processing and more particularly to fin reveal etch processes that maintain recess depth of dielectric materials despite gap width between fins.
Description of the Related Art
A reveal process to remove dielectric for fin field effect transistors (finFETs) formation results in different recess depths of surrounding dielectric due to etch lag sensitivity to a fin pattern. Different sized gaps between the fins result in different recess depths thereby exposing different amounts of adjacent fins. Different exposed heights can cause different operating conditions, gate size, variability in control of on-off switching, etc. within the devices created by the fins.